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DAC
2006
ACM
16 years 25 days ago
Statistical logic cell delay analysis using a current-based model
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram
DATE
2008
IEEE
101views Hardware» more  DATE 2008»
15 years 6 months ago
Resilient Dynamic Power Management under Uncertainty
With the increasing levels of variability and randomness in the characteristics and behavior of manufactured nanoscale structures and devices, achieving performance optimization u...
Hwisung Jung, Massoud Pedram
VTS
2008
IEEE
104views Hardware» more  VTS 2008»
15 years 6 months ago
Signature Rollback - A Technique for Testing Robust Circuits
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
Uranmandakh Amgalan, Christian Hachmann, Sybille H...
DAC
2010
ACM
15 years 3 months ago
Representative path selection for post-silicon timing prediction under variability
The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...
Lin Xie, Azadeh Davoodi
CGF
2008
177views more  CGF 2008»
14 years 12 months ago
Expressive Facial Gestures From Motion Capture Data
Human facial gestures often exhibit such natural stochastic variations as how often the eyes blink, how often the eyebrows and the nose twitch, and how the head moves while speaki...
Eunjung Ju, Jehee Lee