266 search results - page 17 / 54 » Vector instruction set support for conditional operations |
101
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FLAIRS
2008
15 years 1 months ago
2008
Preferences in constraint problems are common but significant in many real world applications. In this paper, we extend our conditional and composite CSP (CCCSP) framework, managi...
DAC
2000
ACM
16 years 3 days ago
2000
ACM
This paper presents a novel compiler for Esterel, a concurrent synchronous imperative language. It generates fast, small object code by compiling away concurrency, producing a sin...
101
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ASAP
2000
IEEE
15 years 2 months ago
2000
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded proces...
ISCA
1995
IEEE
15 years 2 months ago
1995
IEEE
One can e ectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential bene ts of predicated execution are hig...
CGO
2009
IEEE
15 years 6 months ago
2009
IEEE
The development of high-performance libraries has become extraordinarily difficult due to multiple processor cores, vector instruction sets, and deep memory hierarchies. Often, t...