Sciweavers

266 search results - page 25 / 54
» Vector instruction set support for conditional operations
Sort
View
ASPLOS
2004
ACM
15 years 4 months ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
ASPLOS
2000
ACM
15 years 3 months ago
Symbiotic Jobscheduling for a Simultaneous Multithreading Processor
Simultaneous Multithreading machines fetch and execute instructions from multiple instruction streams to increase system utilization and speedup the execution of jobs. When there ...
Allan Snavely, Dean M. Tullsen
ICMCS
2006
IEEE
152views Multimedia» more  ICMCS 2006»
15 years 5 months ago
Muli-Issue Multi-Threaded Stream Processor
The MISP Processor is a programmable media processor which supports multi-issuing, multi-threading and stream processing techniques. MISP executes applications that have been mapp...
Somayeh Sardashti, Hamid Reza Ghasemi, Omid Fatemi
ICANN
2009
Springer
14 years 9 months ago
MINLIP: Efficient Learning of Transformation Models
Abstract. This paper studies a risk minimization approach to estimate a transformation model from noisy observations. It is argued that transformation models are a natural candidat...
Vanya Van Belle, Kristiaan Pelckmans, Johan A. K. ...
ESANN
2004
15 years 17 days ago
Fuzzy LP-SVMs for Multiclass Problems
Abstract. In this paper, we propose fuzzy linear programming support vector machines (LP-SVMs) that resolve unclassifiable regions for multiclass problems. Namely, in the direction...
Shigeo Abe