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» Vector instruction set support for conditional operations
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ICML
2005
IEEE
15 years 12 months ago
Learning class-discriminative dynamic Bayesian networks
In many domains, a Bayesian network's topological structure is not known a priori and must be inferred from data. This requires a scoring function to measure how well a propo...
John Burge, Terran Lane
82
Voted
MICRO
2010
IEEE
99views Hardware» more  MICRO 2010»
14 years 9 months ago
ScalableBulk: Scalable Cache Coherence for Atomic Blocks in a Lazy Environment
Recently-proposed architectures that continuously operate on atomic blocks of instructions (also called chunks) can boost the programmability and performance of shared-memory mult...
Xuehai Qian, Wonsun Ahn, Josep Torrellas
VLDB
2005
ACM
121views Database» more  VLDB 2005»
15 years 4 months ago
Improving Database Performance on Simultaneous Multithreading Processors
Simultaneous multithreading (SMT) allows multiple threads to supply instructions to the instruction pipeline of a superscalar processor. Because threads share processor resources,...
Jingren Zhou, John Cieslewicz, Kenneth A. Ross, Mi...
SP
2009
IEEE
144views Security Privacy» more  SP 2009»
15 years 6 months ago
Native Client: A Sandbox for Portable, Untrusted x86 Native Code
This paper describes the design, implementation and evaluation of Native Client, a sandbox for untrusted x86 native code. Native Client aims to give browser-based applications the...
Bennet Yee, David Sehr, Gregory Dardyk, J. Bradley...
ISSS
1999
IEEE
120views Hardware» more  ISSS 1999»
15 years 3 months ago
RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions
Abstract--Reservation Tables (RTs) have long been used to detect conflicts between operations that simultaneously access the same architectural resource. Traditionally, these RTs h...
Peter Grun, Ashok Halambi, Nikil D. Dutt, Alexandr...