266 search results - page 34 / 54 » Vector instruction set support for conditional operations |
IEEEPACT
2003
IEEE
15 years 4 months ago
2003
IEEE
Shared memory multiprocessor systems typically provide a set of hardware primitives in order to support synchronization. Generally, they provide single-word read-modify-write hard...
106
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KES
2008
Springer
14 years 11 months ago
2008
Springer
Abstract. This work proposes a family of language-independent semantic kernel functions defined for individuals in an ontology. This allows exploiting wellfounded kernel methods fo...
101
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RCIS
2010
14 years 9 months ago
2010
—The strategies for mining frequent itemsets, which is the essential part of discovering association rules, have been widely studied over the last decade. In real-world datasets,...
ASAP
2009
IEEE
15 years 8 months ago
2009
IEEE
—The Cell processor consists of a general-purpose core and eight cores with a complete SIMD instruction set. Although originally designed for multimedia and gaming, it is current...
ASPLOS
2008
ACM
15 years 1 months ago
2008
ACM
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...