1036 search results - page 162 / 208 » Verification Programs for Abduction |
130
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CCS
2007
ACM
15 years 10 months ago
2007
ACM
Static analysis tools can handle large-scale software and find thousands of defects. But do they improve software security? We evaluate the effect of static analysis tool use on s...
123
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ASPDAC
2004
ACM
15 years 10 months ago
2004
ACM
Many important tasks in circuit design and verification can be performed in practice via reductions to Boolean Satisfiability (SAT), making SAT a fundamental EDA problem. However ...
166
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FM
2003
Springer
15 years 9 months ago
2003
Springer
We present a novel application on model checking through SPIN as a means for verifying purely descriptive specifications written in TRIO, a first order, linear-time temporal logic ...
145
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APSEC
1999
IEEE
15 years 8 months ago
1999
IEEE
For the practical development of provably correct software for embedded systems the close integration of CASE tools and verification tools is required. This paper describes the co...
159
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WETICE
1999
IEEE
15 years 8 months ago
1999
IEEE
In this paper, we address the problem of static slicing on binary executables for the purposes of the malicious code detection in COTS components. By operating directly on binary ...