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» Verification Programs for Abduction
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ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
15 years 6 months ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee
DAC
1997
ACM
15 years 5 months ago
A C-Based RTL Design Verification Methodology for Complex Microprocessor
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon ...
117
Voted
ASIAN
2006
Springer
118views Algorithms» more  ASIAN 2006»
15 years 4 months ago
An Approach to Formal Verification of Arithmetic Functions in Assembly
Abstract. It is customary to write performance-critical parts of arithmetic functions in assembly: this enables finely-tuned algorithms that use specialized processor instructions....
Reynald Affeldt, Nicolas Marti
ATAL
2006
Springer
15 years 4 months ago
Automated analysis and verification of agent behavior
Comprehending and analyzing agent behavior is an arduous task due to complexities in agent systems and sophistication of agent behaviors, in addition to the common difficulties wi...
Tibor Bosse, Dung N. Lam, K. Suzanne Barber
117
Voted
ATAL
2010
Springer
15 years 1 months ago
Distributed BDD-based BMC for the verification of multi-agent systems
We present a method of distributed model checking of multiagent systems specified by a branching-time temporal-epistemic logic. We introduce a serial algorithm, central to the dis...
Andrew V. Jones, Alessio Lomuscio