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» Verification and validation of simulation models
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DAC
2004
ACM
15 years 10 months ago
Abstraction of assembler programs for symbolic worst case execution time analysis
ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
Klaus Schneider, Tobias Schüle
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
15 years 3 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
SENSYS
2005
ACM
15 years 3 months ago
Estimating clock uncertainty for efficient duty-cycling in sensor networks
Radio duty cycling has received significant attention in sensor networking literature, particularly in the form of protocols for medium access control and topology management. Whi...
Saurabh Ganeriwal, Deepak Ganesan, Hohyun Shim, Vl...
ISARCS
2010
240views Hardware» more  ISARCS 2010»
14 years 11 months ago
Engineering a Distributed e-Voting System Architecture: Meeting Critical Requirements
Voting is a critical component of any democratic process; and electronic voting systems should be developed following best practices for critical system development. E-voting has i...
J. Paul Gibson, Eric Lallet, Jean-Luc Raffy
SIGECOM
2010
ACM
183views ECommerce» more  SIGECOM 2010»
15 years 2 months ago
Assessing regret-based preference elicitation with the UTPREF recommendation system
Product recommendation and decision support systems must generally develop a model of user preferences by querying or otherwise interacting with a user. Recent approaches to elici...
Darius Braziunas, Craig Boutilier