1663 search results - page 52 / 333 » Verification and validation of simulation models |
JSS
2010
14 years 4 months ago
2010
Architectural description languages are a useful tool for modeling complex systems at a high level of abstraction. If based on formal methods, they can also serve for enabling the...
DATE
2006
IEEE
15 years 1 months ago
2006
IEEE
We introduce collapsed flushing, a new flushing-based refinement map for automatically verifying safety and liveness properties of term-level pipelined machine models. We also pre...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
JCP
2008
14 years 9 months ago
2008
Verified and validated security policies are essential components of high assurance computer systems. The design and implementation of security policies are fundamental processes i...
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ICCD
2008
IEEE
15 years 6 months ago
2008
IEEE
— Verification remains an integral and crucial phase of today’s microprocessor design and manufacturing process. Unfortunately, with soaring design complexities and decreasing...