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» Verification by Abstract Interpretation
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ISMVL
2007
IEEE
104views Hardware» more  ISMVL 2007»
15 years 11 months ago
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
Mahsan Amoui, Daniel Große, Mitchell A. Thor...
GPCE
2007
Springer
15 years 11 months ago
Safe composition of product lines
Programs of a software product line can be synthesized by composing modules that implement features. Besides high-level domain constraints that govern the compatibility of feature...
Sahil Thaker, Don S. Batory, David Kitchin, Willia...
AGTIVE
2007
Springer
15 years 9 months ago
Visualization, Simulation and Analysis of Reconfigurable Systems
Meta-modeling is well known to define the basic concepts of domain-specific languages in an object-oriented way. Based on graph transformation, an abstract meta-model may be enhanc...
Claudia Ermel, Karsten Ehrig
CAISE
2009
Springer
15 years 9 months ago
Data-Flow Anti-patterns: Discovering Data-Flow Errors in Workflows
Despite the abundance of analysis techniques to discover control-flow errors in workflow designs, there is hardly any support for w verification. Most techniques simply abstract fr...
Nikola Trcka, Wil M. P. van der Aalst, Natalia Sid...
EMSOFT
2004
Springer
15 years 9 months ago
Separation of concerns: overhead in modeling and efficient simulation techniques
Separating the description of important aspects of a design such as behavior and architecture, or computation and communication, may yield significant advantages in design time as...
Guang Yang 0004, Alberto L. Sangiovanni-Vincentell...