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ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 9 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
109
Voted
CORR
2010
Springer
85views Education» more  CORR 2010»
15 years 18 days ago
A Single-Instance Incremental SAT Formulation of Proof- and Counterexample-Based Abstraction
nd Counterexample-Based Abstraction Niklas Een, Alan Mishchenko EECS Department, University of California Berkeley, USA. Nina Amla Cadence Research Laboratroy Berkeley, USA. This p...
Niklas Eén, Alan Mishchenko, Nina Amla
SAS
2009
Springer
119views Formal Methods» more  SAS 2009»
16 years 1 months ago
Abstraction Refinement for Quantified Array Assertions
ion Refinement for Quantified Array Assertions Mohamed Nassim Seghir1, , Andreas Podelski1 , and Thomas Wies1,2 1 University of Freiburg, Germany 2 EPFL, Switzerland Abstract. We p...
Mohamed Nassim Seghir, Andreas Podelski, Thomas Wi...
TAP
2010
Springer
134views Hardware» more  TAP 2010»
14 years 10 months ago
Testing First-Order Logic Axioms in Program Verification
Program verification systems based on automated theorem provers rely on user-provided axioms in order to verify domain-specific properties of code. However, formulating axioms corr...
Ki Yung Ahn, Ewen Denney
CAV
2010
Springer
197views Hardware» more  CAV 2010»
15 years 3 months ago
Abstract Analysis of Symbolic Executions
Analysis of Symbolic Executions Aws Albarghouthi1 , Arie Gurfinkel2 , Ou Wei1,3 , and Marsha Chechik1 1 Department of Computer Science, University of Toronto, Canada 2 Software Eng...
Aws Albarghouthi, Arie Gurfinkel, Ou Wei, Marsha C...