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» Verification by Abstract Interpretation
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117
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FPL
1999
Springer
103views Hardware» more  FPL 1999»
15 years 4 months ago
IP Validation for FPGAs Using Hardware Object Technology
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
ENTCS
2006
142views more  ENTCS 2006»
15 years 18 days ago
Predicate Diagrams for the Verification of Real-Time Systems
We propose a format of predicate diagrams for the verification of real-time systems. We consider systems that are defined as extended timed graphs, a format that combines timed au...
Eun-Young Kang, Stephan Merz
LICS
2000
IEEE
15 years 5 months ago
Game Semantics and Subtyping
While Game Semantics has been remarkably successful at g, often in a fully abstract manner, a wide range of features of programming languages, there has to date been no attempt at...
Juliusz Chroboczek
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 4 months ago
On the Design and Verification Methodology of the Look-Aside Interface
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Moha...
94
Voted
ISCAS
2003
IEEE
135views Hardware» more  ISCAS 2003»
15 years 5 months ago
Formal verification of LTL formulas for SystemC designs
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
Daniel Große, Rolf Drechsler