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ASAP
2007
IEEE
101views Hardware» more  ASAP 2007»
14 years 18 days ago
Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit
Because of the growing importance of decimal floating-point (DFP) arithmetic, specifications for it were recently added to the draft revision of the IEEE 754 Standard (IEEE P754)....
Charles Tsen, Michael J. Schulte, Sonia Gonzalez-N...
VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
14 years 6 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
EURODAC
1995
IEEE
126views VHDL» more  EURODAC 1995»
13 years 9 months ago
Timing optimization by bit-level arithmetic transformations
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
Luc Rijnders, Zohair Sahraoui, Paul Six, Hugo De M...
IJNSEC
2010
247views more  IJNSEC 2010»
13 years 1 months ago
Hardware Implementation of Efficient Modified Karatsuba Multiplier Used in Elliptic Curves
The efficiency of the core Galois field arithmetic improves the performance of elliptic curve based public key cryptosystem implementation. This paper describes the design and imp...
Sameh M. Shohdy, Ashraf El-Sisi, Nabil A. Ismail
DAC
2005
ACM
14 years 7 months ago
MiniBit: bit-width optimization via affine arithmetic
MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the intege...
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayn...