5525 search results - page 114 / 1105 » Verification of Model Transformations |
122
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UML
2004
Springer
15 years 8 months ago
2004
Springer
Abstract. In this paper, we propose a verification methodology for System-OnChip (SoC) design using Unified Modeling Language (UML). We introduce UML as a formal model to analyze a...
132
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TACAS
1998
Springer
15 years 7 months ago
1998
Springer
A state/event model is a concurrent version of Mealy machines used for describing embedded reactive systems. This paper introduces a technique that uses compositionality and depend...
116
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ECLIPSE
2006
ACM
15 years 7 months ago
2006
ACM
In this work we present an Eclipse plug-in for the VInTiMe (Verifier of INtegrated TImed ModEls)1 suite of tools that combines high-level expressive power, unassisted propertypres...
133
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JSA
2007
15 years 3 months ago
2007
Traditional design techniques for embedded systems apply transformations on the source code to optimize hardwarerelated cost factors. Unfortunately, such transformations cannot ad...
149
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SIGSOFT
2007
ACM
16 years 4 months ago
2007
ACM
Finding flaws in security protocol implementations is hard. Finding flaws in the implementations of sensor network security protocols is even harder because they are designed to p...