5525 search results - page 176 / 1105 » Verification of Model Transformations |
123
Voted
ISQED
2003
IEEE
15 years 8 months ago
2003
IEEE
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
120
Voted
ASYNC
2007
IEEE
15 years 7 months ago
2007
IEEE
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
141
Voted
FMCAD
2007
Springer
15 years 7 months ago
2007
Springer
Parameterized heuristics abound in computer aided design and verification, and manual tuning of the respective parameters is difficult and time-consuming. Very recent results from ...
241
Voted
ACL2
2006
ACM
15 years 7 months ago
2006
ACM
We have extended the ACL2 theorem prover to automatically prove properties of VHDL circuits with IBM's Internal SixthSense verification system. We have used this extension to...
141
Voted
ENTCS
2008
15 years 3 months ago
2008
Thanks to recent advances, modern proof assistants now enable verification of realistic sequential programs. However, regarding the concurrency paradigm, previous work essentially...