Abstract: We present a novel approach to the verification of functional-logic programs. For our verification purposes, equational reasoning is not valid due to the presence of non-...
We present several improvements to general-purpose sequential redundancy removal. First, we propose using a robust variety of synergistic transformation and verification algorithm...
Hari Mony, Jason Baumgartner, Viresh Paruthi, Robe...
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
This paper extends the well-known technique of slicing to synchronous reactive programs. Synchronous languages exemplified by Esterel, Lustre, Signal and Argos, novel model of exe...
Abstract. We present an approach to verification of parameterized systems, which is based on program transformation technique known as supercompilation. In this approach the statem...