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ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
15 years 8 months ago
An SPU reference model for simulation, random test generation and verification
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
Yukio Watanabe, Balazs Sallay, Brad W. Michael, Da...
PVLDB
2008
108views more  PVLDB 2008»
15 years 1 months ago
Taming verification hardness: an efficient algorithm for testing subgraph isomorphism
Graphs are widely used to model complicated data semantics in many applications. In this paper, we aim to develop efficient techniques to retrieve graphs, containing a given query...
Haichuan Shang, Ying Zhang, Xuemin Lin, Jeffrey Xu...
ICSE
2007
IEEE-ACM
16 years 2 months ago
Randomized Differential Testing as a Prelude to Formal Verification
Most flight software testing at the Jet Propulsion Laboratory relies on the use of hand-produced test scenarios and is executed on systems as similar as possible to actual mission...
Alex Groce, Gerard J. Holzmann, Rajeev Joshi
DFT
1997
IEEE
108views VLSI» more  DFT 1997»
15 years 6 months ago
Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations
The paper presents a test pattern generation and fault simulation methodology for the detection of catastrophic faults in analogue circuits. The test methodology chosen for evalua...
Stephen J. Spinks, Chris D. Chalk, Ian M. Bell, Ma...
TSE
2010
120views more  TSE 2010»
14 years 8 months ago
Efficient Software Verification: Statistical Testing Using Automated Search
Statistical testing has been shown to be more efficient at detecting faults in software than other methods of dynamic testing such as random and structural testing. Test data are g...
Simon M. Poulding, John A. Clark