Sciweavers

103 search results - page 18 / 21
» Verification of configurable processor cores
Sort
View
69
Voted
ICMI
2003
Springer
99views Biometrics» more  ICMI 2003»
15 years 2 months ago
Using an autonomous cube for basic navigation and input
This paper presents a low-cost and practical approach to achieve basic input using a tactile cube-shaped object, augmented with a set of sensors, processor, batteries and wireless...
Kristof Van Laerhoven, Nicolas Villar, Albrecht Sc...
ICFP
2010
ACM
14 years 10 months ago
A certified framework for compiling and executing garbage-collected languages
We describe the design, implementation, and use of a machinecertified framework for correct compilation and execution of programs in garbage-collected languages. Our framework ext...
Andrew McCreight, Tim Chevalier, Andrew P. Tolmach
DAC
2002
ACM
15 years 10 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik
CASES
2008
ACM
14 years 11 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
MICRO
2000
IEEE
107views Hardware» more  MICRO 2000»
15 years 1 months ago
Register integration: a simple and efficient implementation of squash reuse
Register integration (or simply integration) is a mechanism for incorporating speculative results directly into a sequential execution using data-dependence relationships. In this...
Amir Roth, Gurindar S. Sohi