308 search results - page 13 / 62 » Verification of object-oriented simulation designs |
ICCS
2007
Springer
15 years 1 months ago
2007
Springer
In this paper, we show how symbolic algebra in Mathematica can be used to formally verify analog and mixed signal designs. The verification methodology is based on combining induct...
75
Voted
DAC
2003
ACM
15 years 10 months ago
2003
ACM
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
57
Voted
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
—Behavioral modeling with virtual built-in self-test verification of high-speed wired link designs is described in this paper. Our procedure is based on principles of top-down mi...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
SIGSOFT
2001
ACM
15 years 10 months ago
2001
ACM
There is a growing interest in empirical study in software engineering, both for validating mature technologies and for guiding improvements of less-mature technologies. This pape...