308 search results - page 19 / 62 » Verification of object-oriented simulation designs |
CAV
2008
Springer
14 years 11 months ago
2008
Springer
Power gating is a technique for low power design in which whole sections of the chip are powered off when they are not needed, and powered back on when they are. Functional correct...
ICMCS
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper addresses issues pertaining to the necessity of utilizing formal verification methods in the design of protocols for peer-to-peer multimedia systems. These systems req...
69
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WSC
1998
14 years 11 months ago
1998
This paper presents Timed Petri Nets (TPN) as an analytical approach for verification of computerized queueing network simulation models at steady state. It introduces a generic a...
102
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PERCOM
2010
ACM
14 years 7 months ago
2010
ACM
In autonomic networks, the self-configuration of network entities is one of the most desirable properties. In this paper, we show how formal verification techniques can verify the ...
CODES
2004
IEEE
15 years 1 months ago
2004
IEEE
This paper presents an RTOS-centric hardwareisoftware cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is tha...