308 search results - page 29 / 62 » Verification of object-oriented simulation designs |
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GLVLSI
2009
IEEE
14 years 7 months ago
2009
IEEE
To assist in dynamic assertion-based verification, we present a method to automatically build a test vector generator from a temporal property. Based on the duality between monito...
ICSE
2003
IEEE-ACM
15 years 9 months ago
2003
IEEE-ACM
We present a new methodology for automatic verification of C programs against finite state machine specifications. Our approach is compositional, naturally enabling us to decompos...
CODES
2008
IEEE
14 years 11 months ago
2008
IEEE
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
IWPSE
2010
IEEE
14 years 7 months ago
2010
IEEE
We describe our experiences with the process of designing a domain-specific language (DSL) and corresponding model transformations. The simultaneous development of the language an...
FMCAD
2007
Springer
15 years 1 months ago
2007
Springer
We present a framework for formal verification of embedded custom memories. Memory verification is complicated ifficulty in abstracting design parameters induced by the inherently ...