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» Verification of object-oriented simulation designs
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CASE
2011
102views more  CASE 2011»
13 years 9 months ago
Towards an automated verification process for industrial safety applications
— Legacy systems that do not conform to the norms and regulations imposed by recent safety standards have to be upgraded to meet safety requirements. In this paper, we describe a...
Kleanthis Thramboulidis, Doaa Soliman, Georg Frey
DATE
1999
IEEE
172views Hardware» more  DATE 1999»
15 years 2 months ago
An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
Olivier Pasquier, Jean Paul Calvez
DAC
2005
ACM
15 years 10 months ago
Simulation models for side-channel information leaks
Small, embedded integrated circuits (ICs) such as smart cards are vulnerable to so-called side-channel attacks (SCAs). The attacker can gain information by monitoring the power co...
Kris Tiri, Ingrid Verbauwhede
70
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DAC
2004
ACM
15 years 10 months ago
A frequency relaxation approach for analog/RF system-level simulation
The increasing complexity of today's mixed-signal integrated circuits necessitates both top-down and bottom-up system-level verification. Time-domain state-space modeling and...
Xin Li, Yang Xu, Peng Li, Padmini Gopalakrishnan, ...
GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
14 years 9 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...