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» Verification of object-oriented simulation designs
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DAC
2006
ACM
15 years 10 months ago
Formal analysis of hardware requirements
Formal languages are increasingly used to describe the functional requirements (specifications) of circuits. These requirements are used as a means to communicate design intent an...
Ingo Pill, Simone Semprini, Roberto Cavada, Marco ...
CODES
2008
IEEE
14 years 11 months ago
Specification-based compaction of directed tests for functional validation of pipelined processors
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
Heon-Mo Koo, Prabhat Mishra
73
Voted
ICCAD
1996
IEEE
129views Hardware» more  ICCAD 1996»
15 years 1 months ago
Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
N. P. van der Meijs, T. Smedes
DATE
2000
IEEE
132views Hardware» more  DATE 2000»
15 years 2 months ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
DAC
2006
ACM
15 years 10 months ago
SAT sweeping with local observability don't-cares
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural...
Qi Zhu, Nathan Kitchen, Andreas Kuehlmann, Alberto...