308 search results - page 46 / 62 » Verification of object-oriented simulation designs |
DAC
2003
ACM
15 years 2 months ago
2003
ACM
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
ISMVL
2007
IEEE
15 years 3 months ago
2007
IEEE
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
SI3D
2003
ACM
15 years 2 months ago
2003
ACM
We present algorithms that enable virtual objects to interact with and respond to virtual representations, avatars, of real objects. These techniques allow dynamic real objects, s...
MSWIM
2003
ACM
15 years 2 months ago
2003
ACM
This paper presents ARC (Adaptive Range Control), a communication range control mechanism using directional antennas to be implemented across multiple layers. ARC uses directional...
FPGA
2003
ACM
15 years 2 months ago
2003
ACM
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...