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SP
2003
IEEE
121views Security Privacy» more  SP 2003»
15 years 7 months ago
Specifying and Verifying Hardware for Tamper-Resistant Software
We specify a hardware architecture that supports tamper-resistant software by identifying an “idealized” hich gives the abstracted actions available to a single user program. ...
David Lie, John C. Mitchell, Chandramohan A. Thekk...
85
Voted
AIPS
2004
15 years 3 months ago
Guiding Planner Backjumping Using Verifier Traces
In this paper, we show how a planner can use a modelchecking verifier to guide state space search. In our work on hard real-time, closed-loop planning, we use a modelchecker'...
Robert P. Goldman, Michael J. S. Pelican, David J....
128
Voted
EPK
2006
114views Management» more  EPK 2006»
15 years 3 months ago
Verifying Properties of (Timed) Event Driven Process Chains by Transformation to Hybrid Automata
Abstract: Event-driven Process Chains (EPCs) are a commonly used modelling technique for design and documentation of business processes. Although EPCs have an easy-to-understand no...
Stefan Denne
131
Voted
POPL
2010
ACM
15 years 11 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
SIGSOFT
1994
ACM
15 years 6 months ago
Data Flow Analysis for Verifying Properties of Concurrent Programs
In this paper we present an approach, based on data ow analysis, that can provide cost-e ective analysis of concurrent programs with respect to explicitly stated correctness prope...
Matthew B. Dwyer, Lori A. Clarke