Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
We present an interval branch-and-prune algorithm for computing verified enclosures for the global minimum and all global minimizers of univariate functions subject to bound const...
—A new approach to robot path planning using hyperboloid potential functions is presented in this paper. Unlike parabolic potential functions, where the control force increases w...
This paper presents novel language and analysis techniques that significantly speed up software model checking of data structure properties. Consider checking a red-black tree imp...
We first study the problem of doing Verifiable Secret Sharing (VSS) information theoretically secure for a general access structure. We do it in the model where private channels b...