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» Verifying VLSI Circuits
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143
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ISCAS
1999
IEEE
94views Hardware» more  ISCAS 1999»
15 years 8 months ago
Lower bounds on energy dissipation and noise-tolerance for deep submicron VLSI
In this paper, we obtain the lower bounds on total energy dissipation of deep submicron (DSM) VLSI circuits via an informationtheoretic framework. This framework enables the deriv...
Rajamohana Hegde, Naresh R. Shanbhag
120
Voted
ICCD
2002
IEEE
115views Hardware» more  ICCD 2002»
16 years 18 days ago
Low-Power, High-Speed CMOS VLSI Design
Ubiquitous computing is a next generation information technology where computers and communications will be scaled further, merged together, and materialized in consumer applicati...
Tadahiro Kuroda
113
Voted
ISCAS
2006
IEEE
84views Hardware» more  ISCAS 2006»
15 years 9 months ago
Programmable synaptic weights for an aVLSI network of spiking neurons
—We describe a spiking neuronal network which allows local synaptic weights to be assigned to individual synapses. In previous implementations of neuronal networks, the biases th...
Yingxue Wang, Shih-Chii Liu
130
Voted
ESANN
2003
15 years 5 months ago
VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications
This paper presents the hardware realization of a Hamming artificial neural network, and demonstrates its use in a high-speed precision alignment system. High degree of parallelism...
Stéphane Badel, Alexandre Schmid, Yusuf Leb...
102
Voted
TCAD
1998
83views more  TCAD 1998»
15 years 3 months ago
Telescopic units: a new paradigm for performance optimization of VLSI designs
—This paper introduces a novel optimization paradigm for increasing the throughput of digital systems. The basic idea consists of transforming fixed-latency units into variable-...
Luca Benini, Enrico Macii, Massimo Poncino, Giovan...