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» Verifying and Validating Simulation Models
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FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
15 years 8 months ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...
MOBIHOC
2001
ACM
16 years 2 months ago
Performance of a new Bluetooth scatternet formation protocol
A Bluetooth ad hoc network can be formed by interconnecting piconets into scatternets. The constraints and properties of Bluetooth scatternets present special challenges in formin...
Ching Law, Amar K. Mehta, Kai-Yeung Siu
EMSOFT
2006
Springer
15 years 6 months ago
Analysis of the zeroconf protocol using UPPAAL
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...
Biniam Gebremichael, Frits W. Vaandrager, Miaomiao...
VTC
2007
IEEE
105views Communications» more  VTC 2007»
15 years 9 months ago
Experimental Analysis of Broadcast Reliability in Dense Vehicular Networks
Abstract—Dedicated Short Range Communications (DSRC)based communications enable novel automotive safety applications such as an Extended Electronic Brake Light or Intersection Co...
Kishore Ramachandran, Marco Gruteser, Ryokichi Oni...
TECS
2008
122views more  TECS 2008»
15 years 3 months ago
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
Gunar Schirner, Rainer Dömer