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» Verifying and validating a simulation model
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VSTTE
2005
Springer
15 years 3 months ago
Linking the Meaning of Programs to What the Compiler Can Verify
We formulate some research and development challenges that relate what a verifying compiler can verify to the definition and analysis of the application-content of programs, where...
Egon Börger
DSRT
2008
IEEE
15 years 4 months ago
Observability Checking to Enhance Diagnosis of Real Time Electronic Systems
This paper describes a new property checking approach in order to enhance the diagnosis ability of an electronic embedded system, included in an automotive application. We conside...
Manel Khlif, Mohamed Shawky
WSC
1997
14 years 11 months ago
Automating the Metamodeling Process
Model abstraction using metamodeling has demonstrated the capability to facilitate software reuse, large scale model integration, verification, and validation. Once restricted to...
Don Caughlin
SIGADA
2005
Springer
15 years 3 months ago
Temporal skeletons for verifying time
This paper presents an intermediate notation used in a framework for verification of real-time properties. The framework aims at overcoming the need for the framework user to hav...
Gustaf Naeser, Kristina Lundqvist, Lars Asplund
VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
15 years 10 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...