Sciweavers

1886 search results - page 32 / 378
» Verifying and validating a simulation model
Sort
View
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 6 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
63
Voted
PIMRC
2008
IEEE
15 years 4 months ago
Investigating the validity of IEEE 802.11 MAC modeling hypotheses
—As WLANs employing IEEE 802.11 have become pervasive, many analytic models for predicting their performance have been developed in recent years. Due to the complicated nature of...
K. D. Huang, Ken R. Duffy, David Malone, Douglas J...
CVPR
2007
IEEE
15 years 1 months ago
On the Performance Prediction and Validation for Multisensor Fusion
Multiple sensors are commonly fused to improve the detection and recognition performance of computer vision and pattern recognition systems. The traditional approach to determine ...
Rong Wang, Bir Bhanu
ICFEM
2007
Springer
15 years 3 months ago
Machine-Assisted Proof Support for Validation Beyond Simulink
Simulink is popular in industry for modeling and simulating embedded systems. It is deficient to handle requirements of high-level assurance and timing analysis. Previously, we sh...
Chunqing Chen, Jin Song Dong, Jun Sun 0001
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
14 years 9 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...