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» Verifying and validating a simulation model
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61
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ICCAD
1996
IEEE
144views Hardware» more  ICCAD 1996»
15 years 1 months ago
Validation coverage analysis for complex digital designs
The functional validation of a state-of-the-art digital design is usually performed by simulation of a register-transfer-level model. The degree to which the testvector suite cove...
Richard C. Ho, Mark Horowitz
115
Voted
TVLSI
2008
152views more  TVLSI 2008»
14 years 9 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
WSC
1994
14 years 11 months ago
Downtime data - its collection, analysis, and importance
Until the day when plant production personnel and equipment have no downtime, proper collection and analysis of downtime data will be essential to the development of valid, credib...
Edward J. Williams
SPAA
1998
ACM
15 years 1 months ago
Lamport Clocks: Verifying a Directory Cache-Coherence Protocol
Modern shared-memory multiprocessors use complex memory system implementations that include a variety of non-trivial and interacting optimizations. More time is spent in verifying...
Manoj Plakal, Daniel J. Sorin, Anne Condon, Mark D...
FUIN
2008
88views more  FUIN 2008»
14 years 9 months ago
Validating Behavioral Component Interfaces in Rewriting Logic
Many distributed applications can be understood in terms of components interacting in an open environment such as the Internet. Open environments are subject to change in unpredic...
Einar Broch Johnsen, Olaf Owe, Arild B. Torjusen