Sciweavers

487 search results - page 33 / 98
» Versatile Imaging Architecture Based on a System on Chip
Sort
View
DAC
2008
ACM
16 years 23 days ago
A power and temperature aware DRAM architecture
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temper...
Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Mem...
ACSC
2005
IEEE
15 years 5 months ago
Fractal Image Compression on a Pseudo Spiral Architecture
Fractal image compression is a relatively recent image compression method which exploits similarities in different parts of the image. The basic idea is to represent an image by f...
Huaqing Wang, Meiqing Wang, Tom Hintz, Xiangjian H...
ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
15 years 5 months ago
A High Throughput String Matching Architecture for Intrusion Detection and Prevention
Network Intrusion Detection and Prevention Systems have emerged as one of the most effective ways of providing security to those connected to the network, and at the heart of alm...
Lin Tan, Timothy Sherwood
NOCS
2007
IEEE
15 years 6 months ago
Transaction-Based Communication-Centric Debug
Abstract— The behaviour of systems on chip (SOC) is complex because they contain multiple processors that interact through concurrent interconnects, such as networks on chip (NOC...
Kees Goossens, Bart Vermeulen, Remco van Steeden, ...
ICPR
2004
IEEE
16 years 26 days ago
Face Verification System Architecture Using Smart Cards
A smart card based face verification system is proposed in which the feature extraction and decision making is performed on the card. Such an architecture has many privacy and sec...
Josef Kittler, Kieron Messer, Thirimachos Bourlai