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» Versatile Imaging Architecture Based on a System on Chip
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TPDS
2010
174views more  TPDS 2010»
14 years 10 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
INFORMATICALT
2007
136views more  INFORMATICALT 2007»
14 years 11 months ago
Generic Multimedia Database Architecture Based upon Semantic Libraries
Semantic-based storage and retrieval of multimedia data requires accurate annotation of the data. Annotation can be done either manually or automatically. The retrieval performance...
Omara Abdul Hamid, Muhammad Abdul Qadir, Nadeem If...
89
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SIGMOD
2010
ACM
321views Database» more  SIGMOD 2010»
15 years 4 months ago
HadoopDB in action: building real world applications
HadoopDB is a hybrid of MapReduce and DBMS technologies, designed to meet the growing demand of analyzing massive datasets on very large clusters of machines. Our previous work ha...
Azza Abouzied, Kamil Bajda-Pawlikowski, Jiewen Hua...
CODES
2004
IEEE
15 years 3 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
110
Voted
ANCS
2007
ACM
15 years 3 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos