Sciweavers

130 search results - page 13 / 26
» Vertical Benchmarks for CAD
Sort
View
DAC
2008
ACM
16 years 23 days ago
Optimizing automatic abstraction refinement for generalized symbolic trajectory evaluation
ng Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation Yan Chen Dept. of Computer Science Portland State University Portland, OR, 97207 chenyan@cs.pdx.e...
Yan Chen, Fei Xie, Jin Yang
DAC
1998
ACM
16 years 22 days ago
Reducing Power in High-Performance Microprocessors
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is ...
Vivek Tiwari, Deo Singh, Suresh Rajgopal, Gaurav M...
DAC
2003
ACM
16 years 22 days ago
A tool for describing and evaluating hierarchical real-time bus scheduling policies
We present a tool suite for building, simulating, and analyzing the results of hierarchical descriptions of the scheduling policy for modules sharing a bus in real-time applicatio...
Trevor Meyerowitz, Claudio Pinello, Alberto L. San...
ICCD
2004
IEEE
134views Hardware» more  ICCD 2004»
15 years 8 months ago
An Automatic Test Pattern Generation Framework for Combinational Threshold Logic Networks
— We propose an automatic test pattern generation (ATPG) framework for combinational threshold networks. The motivation behind this work lies in the fact that many emerging nanot...
Pallav Gupta, Rui Zhang, Niraj K. Jha
AHS
2007
IEEE
252views Hardware» more  AHS 2007»
15 years 6 months ago
A Hybrid Engine for the Placement of Domain-Specific Reconfigurable Arrays
Rapid-prototyping of commercial devices and the demanding requirements for flexible hardware in mobile applications have driven the raise of reconfigurable hardware. The adaptatio...
Wing On Fung, Tughrul Arslan, Sami Khawam