130 search results - page 14 / 26 » Vertical Benchmarks for CAD |
ISPD
2006
ACM
15 years 5 months ago
2006
ACM
Advances in VLSI technology make clock skew more susceptible to process variations. Notwithstanding efficient zero skew routing algorithms, clock skew still limits post-manufactu...
GLVLSI
2005
IEEE
15 years 5 months ago
2005
IEEE
Boolean Satisfiability (SAT) solvers are popular engines used throughout the verification world. Bounded sequential problems such as bounded model checking and bounded sequentia...
ISLPED
2005
ACM
15 years 5 months ago
2005
ACM
As FPGAs enter the nanometer regime, several modifications are needed to reduce the increasing leakage power dissipation. Hence, this work presents some modifications to the FPG...
ISLPED
2004
ACM
15 years 5 months ago
2004
ACM
Voltage islands enable core-level power optimization for Systemon-Chip (SoC) designs by utilizing a unique supply voltage for each core. Architecting voltage islands involves isla...
ISPD
2004
ACM
15 years 5 months ago
2004
ACM
Many current designs contain a large number of standard cells intermixed with larger macro blocks. The range of size in these “mixed block” designs complicates the placement p...