130 search results - page 22 / 26 » Vertical Benchmarks for CAD |
ISPD
2005
ACM
15 years 5 months ago
2005
ACM
In the nanometer VLSI technology, the variation effects like manufacturing variation, power supply noise, temperature etc. become very significant. As one of the most vital nets...
116
click to vote
ISPD
2005
ACM
15 years 5 months ago
2005
ACM
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
FPGA
2004
ACM
15 years 5 months ago
2004
ACM
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
GLVLSI
2010
IEEE
15 years 4 months ago
2010
IEEE
Clock skew variations adversely affect timing margins, limiting performance, reducing yield, and may also lead to functional faults. Non-tree clock distribution networks, such as ...
78
Voted
ICCAD
1997
IEEE
15 years 4 months ago
1997
IEEE
This paper is concerned with approximate delay computation algorithms for combinational circuits. As a result of intensive research in the early 90’s [3, 8] efficient tools exi...