130 search results - page 4 / 26 » Vertical Benchmarks for CAD |
97
Voted
FPL
2005
Springer
15 years 7 months ago
2005
Springer
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
94
Voted
CHI
2003
ACM
16 years 2 months ago
2003
ACM
This paper presents a Computer-Aided Design (CAD) platform for designers to navigate and construct 3D model intuitively through Tangible User Interfaces (TUIs). We suggest that 3D...
101
Voted
DAC
1999
ACM
16 years 2 months ago
1999
ACM
We empirically assess the implications of fixed terminals for hypergraph partitioning heuristics. Our experimental testbed incorporates a leading-edge multilevel hypergraph partit...
103
Voted
ISPD
2003
ACM
15 years 7 months ago
2003
ACM
Over the last five years the VLSI Placement community achieved great strides in the understanding of placement problems, developed new high-performance algorithms, and achieved i...
100
Voted
ISPD
1999
ACM
15 years 6 months ago
1999
ACM
The presence of fixed terminals in hypergraph partitioning instances arising in top-down standard-cell placement makes such instances qualitatively different from the free hyperg...