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JTAER
2006
100views more  JTAER 2006»
14 years 9 months ago
A Model for Improving e-Security in Australian Universities
As universities seek to adopt increased e-business, e-commerce and e-learning initiates, the overall approach taken for security management within the organisation plays an increa...
Lauren May, Tim Lane
96
Voted
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
15 years 3 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
VLSISP
2008
140views more  VLSISP 2008»
14 years 9 months ago
Regular Expression Matching in Reconfigurable Hardware
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
Ioannis Sourdis, João Bispo, João M....
97
Voted
DAC
2005
ACM
14 years 11 months ago
Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation
On-chip supply networks are playing an increasingly important role for modern nanometer-scale designs. However, the ever growing sizes of power grids make the analysis problem ext...
Peng Li
GEOS
2007
Springer
15 years 3 months ago
Modeling Spatio-temporal Network Computations: A Summary of Results
Spatio-temporal network is defined by a set of nodes, and a set of edges, where the properties of nodes and edges may vary over time. Such networks are encountered in a variety of...
Betsy George, Shashi Shekhar