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ASPLOS
2006
ACM
15 years 4 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
ISPASS
2009
IEEE
15 years 4 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
PLDI
2009
ACM
15 years 4 months ago
Dynamic software updates: a VM-centric approach
Software evolves to fix bugs and add features. Stopping and restarting programs to apply changes is inconvenient and often costly. Dynamic software updating (DSU) addresses this ...
Suriya Subramanian, Michael W. Hicks, Kathryn S. M...
GLOBECOM
2006
IEEE
15 years 4 months ago
On the Suitability of Applications for GMPLS Networks
— After identifying that current GMPLS specifications only allow for the implementation of a call blocking mode of operation that handles immediate-request calls (not book-ahead...
Malathi Veeraraghavan, Xiuduan Fang, Xuan Zheng
SG
2005
Springer
15 years 3 months ago
Knowledge in the Loop: Semantics Representation for Multimodal Simulative Environments
This article describes the integration of knowledge based techniques into simulative Virtual Reality (VR) applications. The approach is motivated ltimodal Virtual Construction as a...
Marc Erich Latoschik, Peter Biermann, Ipke Wachsmu...