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» Virtualization of Hardware - Introduction and Survey
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EGITALY
2006
15 years 6 months ago
An Architecture for Distributed Behavioral Models with GPUs
We describe an architecture for massive simulation of a distributed behavioral model using graphics hardware. By leveraging on the recent programmable capabilities of GPUs we impl...
Rosario De Chiara, Ugo Erra, Vittorio Scarano
ICCD
2008
IEEE
150views Hardware» more  ICCD 2008»
16 years 2 months ago
Timing analysis considering IR drop waveforms in power gating designs
—IR drop noise has become a critical issue in advanced process technologies. Traditionally, timing analysis in which the IR drop noise is considered assumes a worst-case IR drop ...
Shih-Hung Weng, Yu-Min Kuo, Shih-Chieh Chang, Malg...
DATE
2008
IEEE
167views Hardware» more  DATE 2008»
15 years 12 months ago
Accuracy-Adaptive Simulation of Transaction Level Models
Simulation of transaction level models (TLMs) is an established embedded systems design technique. Its use cases include virtual prototyping for early software development, platfo...
Martin Radetzki, Rauf Salimi Khaligh
DATE
2006
IEEE
128views Hardware» more  DATE 2006»
15 years 11 months ago
Efficient link capacity and QoS design for network-on-chip
This paper addresses the allocation of link capacities in the automated design process of a network-on-chip based system. Communication resource costs are minimized under Quality-...
Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israe...
DATE
2006
IEEE
98views Hardware» more  DATE 2006»
15 years 11 months ago
Power-constrained test scheduling for multi-clock domain SoCs
This paper presents a wrapper and test access mechanism design for multi-clock domain SoCs that consists of cores with different clock frequencies during test. We also propose a t...
Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara