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HICSS
1997
IEEE
120views Biometrics» more  HICSS 1997»
15 years 4 months ago
Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
Peter Bach, Michael Braun, Arno Formella, Jör...
RTCSA
1997
IEEE
15 years 4 months ago
On memory protection in real-time OS for small embedded systems
Memory protection is an important OS feature for the reliability and safety of real-time control systems. In this paper, we study the feasibility of memory protection in small emb...
Shoji Suzuki, Kang G. Shin
SI3D
1997
ACM
15 years 4 months ago
Managing Latency in Complex Augmented Reality Systems
Registration (or alignment) of the synthetic imagery with the real world is crucial in augmented reality (AR) systems. The data from user-input devices, tracking devices, and imag...
Marco C. Jacobs, Mark A. Livingston, Andrei State
HPCA
1996
IEEE
15 years 4 months ago
Fault-Tolerance with Multimodule Routers
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
Suresh Chalasani, Rajendra V. Boppana
ASPLOS
1996
ACM
15 years 4 months ago
Synchronization and Communication in the T3E Multiprocessor
This paper describes the synchronization and communication primitives of the Cray T3E multiprocessor, a shared memory system scalable to 2048 processors. We discuss what we have l...
Steven L. Scott