Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Wire pipelining has been proposed as a viable mean to break the discrepancy between decreasing gate delays and increasing wire delays in deep-submicron technologies. Far from bein...
Test planning for core-based system-on-a-chip (SOC) designs is necessary to reduce testing time and test cost. In this paper, we survey recent advances in test planning that addre...
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan M...
- Key characteristics of newly emerging IC technologies render the traditional concept of die size minimization and traditional "design rules" insufficient to handle the ...
Wojciech Maly, Hans T. Heineken, Jitendra Khare, P...
After a survey of some realizations of self-replicating machines, this paper presents the construction based selfreplication of universal 3D structures. This self-replication proc...