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ASPLOS
2008
ACM
15 years 3 months ago
Archipelago: trading address space for reliability and security
Memory errors are a notorious source of security vulnerabilities that can lead to service interruptions, information leakage and unauthorized access. Because such errors are also ...
Vitaliy B. Lvin, Gene Novark, Emery D. Berger, Ben...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
15 years 1 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
SIGMOD
2009
ACM
137views Database» more  SIGMOD 2009»
16 years 1 months ago
Advances in flash memory SSD technology for enterprise database applications
The past few decades have witnessed a chronic and widening imbalance among processor bandwidth, disk capacity, and access speed of disk. According to Amdhal's law, the perfor...
Sang-Won Lee, Bongki Moon, Chanik Park
IEEEPACT
2006
IEEE
15 years 7 months ago
A low-cost memory remapping scheme for address bus protection
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhan...
HPCA
2003
IEEE
16 years 2 months ago
Memory System Behavior of Java-Based Middleware
Java-based middleware, and application servers in particular, are rapidly gaining importance as a new class of workload for commercial multiprocessor servers. SPEC has recognized ...
Martin Karlsson, Kevin E. Moore, Erik Hagersten, D...