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ICS
1999
Tsinghua U.
15 years 5 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
HPDC
1997
IEEE
15 years 5 months ago
Cut-Through Delivery in Trapeze: An Exercise in Low-Latency Messaging
New network technology continues to improve both the latency and bandwidth of communication in computer clusters. The fastest high-speed networks approach or exceed the I/O bus ba...
Ken Yocum, Jeffrey S. Chase, Andrew J. Gallatin, A...
IPPS
1996
IEEE
15 years 5 months ago
Implementing the Data Diffusion Machine Using Crossbar Routers
The Data Diffusion Machine is a scalable virtual shared memory architecture. A hierarchical network is used to ensure that all data can be located in a time bounded by O(logp), wh...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
IWMM
2010
Springer
137views Hardware» more  IWMM 2010»
15 years 5 months ago
The locality of concurrent write barriers
Concurrent and incremental collectors require barriers to ensure correct synchronisation between mutator and collector. The overheads imposed by particular barriers on particular ...
Laurence Hellyer, Richard Jones, Antony L. Hosking
IWMM
2000
Springer
113views Hardware» more  IWMM 2000»
15 years 5 months ago
On the Effectiveness of GC in Java
We study the effectiveness of garbage collection (GC) algorithms by measuring the time difference between the actual collection time of an object and the potential earliest collec...
Ran Shaham, Elliot K. Kolodner, Shmuel Sagiv