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ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
15 years 5 months ago
High-Bandwidth Address Translation for Multiple-Issue Processors
In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing ...
Todd M. Austin, Gurindar S. Sohi
DIMVA
2008
15 years 2 months ago
Data Space Randomization
Over the past several years, US-CERT advisories, as well as most critical updates from software vendors, have been due to memory corruption vulnerabilities such as buffer overflo...
Sandeep Bhatkar, R. Sekar
MICRO
2008
IEEE
146views Hardware» more  MICRO 2008»
15 years 1 months ago
A small cache of large ranges: Hardware methods for efficiently searching, storing, and updating big dataflow tags
Dynamically tracking the flow of data within a microprocessor creates many new opportunities to detect and track malicious or erroneous behavior, but these schemes all rely on the...
Mohit Tiwari, Banit Agrawal, Shashidhar Mysore, Jo...
117
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SIGMETRICS
2008
ACM
140views Hardware» more  SIGMETRICS 2008»
15 years 1 months ago
Scalable VPN routing via relaying
Enterprise customers are increasingly adopting MPLS (Multiprotocol Label Switching) VPN (Virtual Private Network) service that offers direct any-to-any reachability among the cust...
Changhoon Kim, Alexandre Gerber, Carsten Lund, Dan...
COMPUTER
1998
68views more  COMPUTER 1998»
15 years 1 months ago
Making Network Interfaces Less Peripheral
Much of a computer’s value depends on how well it interacts with networks. To enhance this value, designers must improve the performance of networks delivered to users. Fortunat...
Shubhendu S. Mukherjee, Mark D. Hill