Sciweavers

2811 search results - page 378 / 563
» Virtue: Performance Visualization of Parallel and Distribute...
Sort
View
ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
15 years 9 months ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis
ISCA
2002
IEEE
127views Hardware» more  ISCA 2002»
15 years 9 months ago
The Optimum Pipeline Depth for a Microprocessor
The impact of pipeline length on the performance of a microprocessor is explored both theoretically and by simulation. An analytical theory is presented that shows two opposing ar...
Allan Hartstein, Thomas R. Puzak
120
Voted
ICS
2004
Tsinghua U.
15 years 9 months ago
A dynamic application-driven data communication strategy
The use of semi-Lagrangian formulations in numerical weather predication models (NWP) allows for an increase in time step size. Use of this method can increase performance of thes...
Paul van der Mark, Lex Wolters, Gerard Cats
131
Voted
CATA
2004
15 years 5 months ago
The Instruction Execution Mechanism for Responsive Multithreaded Processor
This paper describes the instruction execution mechanism of Responsive Multithreaded (RMT) Processor for distributed real-time processing. The execution order of each thread is co...
Tstomu Itou, Nobuyuki Yamasaki
IPPS
2009
IEEE
15 years 10 months ago
Optimizing assignment of threads to SPEs on the cell BE processor
The Cell is a heterogeneous multicore processor that has attracted much attention in the HPC community. The bulk of the computational workload on the Cell processor is carried by ...
C. Devi Sudheer, T. Nagaraju, Pallav K. Baruah, As...