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IJCNN
2006
IEEE
15 years 9 months ago
Real-Time Implementation of an Optimal Transient Neurocontroller for a GCSC
—This paper presents the design of an optimal Auxiliary Transient Neurocontroller (ATNC) for the Gate Controlled Series Capacitor (GCSC) in a multi-machine power system. GCSC is ...
Swakshar Ray, Ganesh K. Venayagamoorthy
RTCSA
2006
IEEE
15 years 9 months ago
Hardware-Software Codesign of Multimedia Embedded Systems: the PeaCE
Hardware/software codesign involves various design problems including system specification, design space exploration, hardware/software co-verification, and system synthesis. A co...
Soonhoi Ha, Choonseung Lee, Youngmin Yi, Seongnam ...
WECWIS
2006
IEEE
151views ECommerce» more  WECWIS 2006»
15 years 9 months ago
DAG Synchronization Constraint Language for Business Processes
Correct synchronization among activities is critical in a business process. Current workflow languages such as BPEL specify the control flow of processes explicitly. However, thei...
Qinyi Wu, Akhil Sahai
DAC
2006
ACM
15 years 9 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
15 years 9 months ago
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi,...