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IPPS
2009
IEEE
16 years 1 months ago
A cross-input adaptive framework for GPU program optimizations
Abstract—Recent years have seen a trend in using graphic processing units (GPU) as accelerators for general-purpose computing. The inexpensive, single-chip, massively parallel ar...
Yixun Liu, Eddy Z. Zhang, Xipeng Shen
IPPS
2009
IEEE
16 years 1 months ago
Building a parallel pipelined external memory algorithm library
Large and fast hard disks for little money have enabled the processing of huge amounts of data on a single machine. For this purpose, the well-established STXXL library provides a...
Andreas Beckmann, Roman Dementiev, Johannes Single...
HOTI
2008
IEEE
16 years 28 days ago
Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics
We present a new monolithic silicon photonics technology suited for integration with standard bulk CMOS processes, which reduces costs and improves opto-electrical coupling compar...
Christopher Batten, Ajay Joshi, Jason Orcutt, Anat...
ICPP
2008
IEEE
16 years 28 days ago
VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers
This paper presents a novel stateless, virtualized communication engine for sub-microsecond latency. Using a Field-Programmable-Gate-Array (FPGA) based prototype we show a latency...
Heiner Litz, Holger Fröning, Mondrian Nü...
IPPS
2008
IEEE
16 years 27 days ago
Parallel mining of closed quasi-cliques
Graph structure can model the relationships among a set of objects. Mining quasi-clique patterns from large dense graph data makes sense with respect to both statistic and applica...
Yuzhou Zhang, Jianyong Wang, Zhiping Zeng, Lizhu Z...
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