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ASPDAC
1995
ACM
103views Hardware» more  ASPDAC 1995»
15 years 5 months ago
A scheduling algorithm for multiport memory minimization in datapath synthesis
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
Hae-Dong Lee, Sun-Young Hwang
130
Voted
CCS
2008
ACM
15 years 4 months ago
Code injection attacks on harvard-architecture devices
Harvard architecture CPU design is common in the embedded world. Examples of Harvard-based architecture devices are the Mica family of wireless sensors. Mica motes have limited me...
Aurélien Francillon, Claude Castelluccia
GIL
2004
15 years 3 months ago
Web-basiertes GIS als Informationssystem interdisziplinerer Forschungsprojekte
Abstract: Interdisciplinary research projects with environmental focus need an information technology which is capable of describing the flow of minerals and other substances with ...
Claus Mückschel, Gabriel A. Schachtel, Jens N...
IM
2003
15 years 3 months ago
Facilitating Efficient and Reliable Monitoring through HAMSA
: Monitoring is a fundamental building block of any network management system. It is needed to ensure that the network operates within the required parameters, and to account for u...
David Breitgand, Danny Dolev, Danny Raz, Gleb Shav...
WSC
2000
15 years 3 months ago
Abstract modeling for engineering and engagement level simulations
MODELING FOR ENGINEERING AND ENGAGEMENT LEVEL SIMULATIONS Robert M. McGraw Richard A. MacDonald RAM Laboratories, Inc. 6540 Lusk Boulevard, Suite C200 San Diego, CA 92121, U.S.A. ...
Robert M. McGraw, Richard A. MacDonald
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