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DATE
2003
IEEE
140views Hardware» more  DATE 2003»
13 years 11 months ago
Qualifying Precision of Abstract SystemC Models Using the SystemC Verification Standard
ng precision of abstract SystemC models using the SystemC Verification Standard Franco Carbognani1 , Christopher K. Lennard2 , C. Norris Ip3 , Allan Cochrane2 , Paul Bates2 1 Caden...
Franco Carbognani, Christopher K. Lennard, C. Norr...
DATE
2005
IEEE
104views Hardware» more  DATE 2005»
13 years 12 months ago
A SoC Design Methodology Involving a UML 2.0 Profile for SystemC
In this paper, we present a SoC design methodology joining the capabilities of UML and SystemC to operate at systemlevel. We present a UML 2.0 profile of the SystemC language expl...
Elvinia Riccobene, Patrizia Scandurra, Alberto Ros...
DAC
2008
ACM
14 years 7 months ago
Partial order reduction for scalable testing of systemC TLM designs
A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is nondeterministic. To leverage testing of a SystemC TLM design, we f...
Sudipta Kundu, Malay K. Ganai, Rajesh Gupta
SBCCI
2003
ACM
136views VLSI» more  SBCCI 2003»
13 years 11 months ago
SystemC and the Future of Design Languages: Opportunities for Users and Research
There has been a lot of discussion, and a lot of confusion, about the various existing and new design languages recently. SystemC, SystemVerilog, Verilog2005, e, Vera, PSL/Sugar, ...
Grant Martin
ERSA
2006
282views Hardware» more  ERSA 2006»
13 years 7 months ago
SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture
Reconfigurable devices, such as FPGAs, introduce into the design workflow of embedded systems a new degree of freedom: the designer can have the system autonomously modify the fun...
Carlo Amicucci, Fabrizio Ferrandi, Marco D. Santam...